Merge requests · Silke Hofstra / dds-processor

Merge trains

Booth algorithm elaboration

!47 · created Apr 22, 2017 by Koen Zandberg
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- 2
updated Apr 22, 2017
Add VUnit install requirements

!46 · created Apr 22, 2017 by Silke Hofstra
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updated Apr 22, 2017
Report app modelsim

!45 · created Apr 21, 2017 by Koen Zandberg
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- 2
updated Apr 22, 2017
Try to make less of a mess of the tables

!43 · created Apr 21, 2017 by Silke Hofstra
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updated Apr 22, 2017
Add RTL overview

!42 · created Apr 21, 2017 by Koen Zandberg
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updated Apr 21, 2017
A large amounts of nits picked by a contributor

!41 · created Apr 21, 2017 by Silke Hofstra
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updated Apr 21, 2017
Add synthesis results

!40 · created Apr 21, 2017 by Koen Zandberg
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- 12
updated Apr 21, 2017
Minor

!39 · created Apr 21, 2017 by Koen Zandberg
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updated Apr 21, 2017
Add conclusion and pick some nits

!38 · created Apr 21, 2017 by Silke Hofstra
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updated Apr 21, 2017
Short explanation of the other division algorithms

!37 · created Apr 21, 2017 by Koen Zandberg
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- 1
updated Apr 21, 2017
Minor addition

!36 · created Apr 21, 2017 by Koen Zandberg
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updated Apr 21, 2017
Add explanation of the decoder and register map

!35 · created Apr 21, 2017 by Koen Zandberg
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- 8
updated Apr 21, 2017
Power dissipation & bib fix

!34 · created Apr 21, 2017 by Silke Hofstra
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updated Apr 21, 2017
Add statechart for the decoder

!32 · created Apr 21, 2017 by Koen Zandberg
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updated Apr 21, 2017
Add statechart for the memory controller

!31 · created Apr 21, 2017 by Koen Zandberg
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updated Apr 21, 2017
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!24 · created Apr 20, 2017 by Silke Hofstra
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updated Apr 21, 2017